SPICE Device Model Si7230DN N-Channel 30-V (D-S) MOSFET
●DESCRIPTION
■The attached spice model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the −55 to 125°C temperature ranges under the pulsed 0-V to 10-V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage.
■A novel gate-to-drain feedback capacitance network is used to model the gate charge characteristics while avoiding convergence difficulties of the switched Cgd model. All model parameter values are optimized to provide a best fit to the measured electrical data and are not intended as an exact physical interpretation of the device.
●CHARACTERISTICS
■N-Channel Vertical DMOS
■Macro Model (Subcircuit Model)
■Level 3 MOS
■Apply for both Linear and Switching Application
■Accurate over the −55 to 125°C Temperature Range
■Model the Gate Charge, Transient, and Diode Reverse Recovery Characteristics
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Datasheet |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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11-Dec-06 |
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Rev. A |
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74358 |
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325 KB |
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