GR533x Hardware Design Guidelines
●This document presents the necessary circuit required for proper operation of GR533x Bluetooth System-on-Chips (SoCs). Recommended chip interfaces, peripherals, schematic diagram, and PCB layout guidelines of the GR533x SoC family are provided.
●This Hardware Design Guidelines intends to help system designers build minimal Bluetooth Low Energy (Bluetooth LE) hardware circuits and develop Bluetooth products.
■Product Overview
●The Goodix GR533x series is a Bluetooth Low Energy (Bluetooth LE) 5.3 System-on-Chip (SoC), suitable for Internet of Thing (IoT) applications, supporting Bluetooth mesh networking protocols.
●Based on Arm® Cortex®-M4F CPU core running at 64 MHz, the GR533x integrates a 2.4 GHz RF transceiver, Bluetooth LE 5.3 protocol stack, 512 KB on-chip Flash memory, 96 KB system SRAM, and a rich set of peripherals. It provides excellent RF performance, with a maximum of +15 dBm TX power, -99 dBm RX sensitivity and a maximum of 114 dB link budget in Bluetooth LE 1 Mbps mode.
●With two main power supply schemes (DC-DC and system LDO), the GR533x offers flexible options to achieve a balance between low power consumption and economical BOM.
●GR533x devices are offered in both QFN32 and QFN48 packages. The following table lists the detailed package configurations.
GR533x 、 GR533x series 、 GR5331AENI 、 GR5331CENI 、 GR5332AENE 、 GR5332CENE |
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Bluetooth System-on-Chips 、 SoCs 、 Bluetooth Low Energy 5.3 System-on-Chip 、 Bluetooth LE 5.3 SoC |
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Application note & Design Guide |
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Please see the document for details |
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QFN32;QFN48 |
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English Chinese Chinese and English Japanese |
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2023-11-14 |
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Version: 1.1 |
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2.9 MB |
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