N32WB03x Bluetooth® Low Energy wireless SoC Family User manual
■The N32WB03x has built-in independent watchdog (IWDG) and window watchdog (WWDG) timers to solve the problems caused by software errors. Watchdog timer is very flexible to use, which improves the safety of the system and the accuracy of timing control.
■Independent Watchdog (IWDG) is driving by Low-speed internal clock (LSI clock) running at 30 KHz, which will still running event dead loop or MCU stuck is happening. This can provide higher safety level, timing accuracy and flexibility of watchdog. It can reset and resolve system malfunctions due to software failure. The IWDG is best suited for applications that require the watchdog to run as a totally independent process outside the main application, but have lower timing accuracy constraints.
■When the power control register PWR_CTRL2.IWDGRSTEN bit is '1' and the IWDG counter reaches 0, a system reset will be generated (if this bit is '0', the IWDG will count but not reset).
■Note: This chapter is based on the system default value IWDGRSTEN = 1.
●Main features
■A 12-bit down-counter that runs independently
◼ RC oscillator provides an independent clock source and can work normally in STOP mode
◼ Reset can be matched.
◼ A system reset occurs when the down counter reaches 0x0000(if watchdog activated)
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User's Guide |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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2022.09.19 |
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Version:V1.3 |
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24 MB |
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