IMP16C550 Universal Asynchronous Receiver/Transmitter (UART) with 16-BYTE FIFO's
■The IMP16C550 Universal Asynchronous Receiver Transmitter (UART) is a CMOS-VLSI communication device in a single package.
■The UART performs serial to parallel conversion on data characters received from a peripheral device or a MODEM, and parallel-to-serial conversions on data characters received from the CPU. The CPU can read the complete status of the UART at any time during the functional operation. Status information reported includes the type and condition of the transfer operation being performed by the UART, as well as any error conditions (party, overrun, framing, or break detect).
●Description
■The IMP16C550 is an enhanced version of the IMP16C450 Universal Asynchronous Receiver/Transmitter (UART). The improved specifications ensure easy interface with existing microprocessors systems with DMA controller. Functionally identical to the IMP16C450 on power up (in Character Mode) the IMP16C550 can be configured into an alternate mode(FIFO mode) to relieve the CPU of excessive software overhead due to interrupts.
■In FIFO mode, internal FIFO’s are activated allowing 16 bytes (plus 3 bits of error data per byte in the RCVR FIFO) to be stored in both receive and transmit modes. All the logic is on chip to minimize system overhead and maximize system efficiency. Two FIFO control pins have been added to allow signaling of DMA transfers.
■The UART performs serial-to-parallel conversion on data characters received from a peripheral device or a MODEM, and parallel-to-serial conversion on data characters received from the CPU. The CPU can read the complete status of the UART at any time during the functional operation. Status information reported includes the type and condition of the transfer operations being performed by the UART, as well as any error conditions (parity, overrun, framing, or break interrupt).
■The UART includes a programmable baud rate generator that is capable of dividing the timing reference clock input by divisors of 1 to (216-1), and producing a 16x clock to drive the internal transmitter logic. Provisions are also included to use this 16x clock to drive the receive logic. The UART has complete MODEM-control capability, and a processor interrupts system. Interrupts can be programmed to the users requirements, minimizing the computing required to handle the communications link. UART is designed to work either in a polled or an interrupt driven environment selected by software.
■The UART is fabricated using IMP‘s advanced double metal CMOS process.
●Key Features
■5V Operation
■Full duplex asynchronous receiver and transmitter
■Easily interfaces to most popular micro-processors
■Adds or deletes standard asynchronous communication bits (start, stop, and parity) to or from a serial data stream
■Independently controlled transmitter, receiver, line status, and data set interrupts
■Programmable baud rate generator allows division of any input clock by 1 to (216-1) and generates the internal 16 x clock
■Independent receiver clock input
■MODEM control functions (CTS, RTS, DSR, DTR, RI,and DCD)
■Fully programmable serial interface characteristics:
◆5, 6, 7, or 8 bit characters
◆Even, odd, or no-parity bit generation and detection
◆1, 1.5, or 2 stop bit generation
◆Baud generation (DC to 56k baud)
■False start bit detection
■Complete status reporting capabilities
■Tri-State® TTL drive capabilities for bi-directional data bus and control bus
■Line break generation and detection
■Internal diagnostic capabilities:
◆Loopback controls for communications link fault isolation
◆Break, parity overrun, and framing error simulation
■Fully prioritized interrupt systems controls
■16 byte FIFO for reduced CPU overhead
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IMP16C550 、 IMP16C550A 、 IMP16C550-CP40 、 IMP16C550-CJ44 、 IMP16C550-A48 |
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Universal Asynchronous Receiver/Transmitter (UART) 、 Universal Asynchronous Receiver Transmitter (UART) 、 UART |
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Datasheet |
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Please see the document for details |
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PDIP;TQFP;DIP;PLCC |
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English Chinese Chinese and English Japanese |
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08/08/05 |
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Revision:A |
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996 KB |
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