MachXO2 Programming and Configuration Usage Guide Technical Note
■The MachXO2™ is an SRAM-based Programmable Logic Device that includes an internal Flash memory which makes the MachXO2 appear to be a non-volatile device. The MachXO2 provides a rich set of features for programming and configuration of the FPGA. You have many options available to you for building the programming solution that fits your needs. Each of the options available is described in detail so that you can put together the programming and configuration solution that meets your needs.
●MachXO2 Features
■Key programming and configuration features of MachXO2 devices are:
▲Instant-on configuration from internal Flash PROM –powers up in milliseconds
▲Single-chip, secure solution
▲Multiple programming and configuration interfaces:
◆1149.1 JTAG
◆Self-download
◆Slave SPI
◆Master SPI
◆Dual Boot
◆I²C
◆WISHBONE bus
▲User Flash Memory (UFM) for non-volatile data storage:
◆Configuration Flash memory overflow
◆EBR Initialization data
◆Application specific data
▲Transparent programming of non-volatile memory
▲Optional dual boot with external SPI memory
▲Optional security bits for design protection
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Application note & Design Guide |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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February 2021 |
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Revision 4.1 |
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FPGA-TN-02155-4.1 |
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1.5 MB |
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