LL10GEMAC IP Demo Instruction
■This document describes the instruction to run loopback demo on FPGA development board. The demo is designed to run LL10GEMAC IP loopback test for measuring the round-trip latency time. User sets test parameters on FPGA board and monitors the hardware status via console. More details of the demo are described as follows.
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User's Guide |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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29-Apr-21 |
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Rev1.1 |
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500 KB |
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