CMS32M55xx ARM® Cortex®-M0 32-bit motor microcontroller Datasheet

2023-01-06
●System Description
■System Introduction
▲This series of products has integrated ARM® Cortex®-M0 with Nested Vectored Interrupt Controller. It has parallel I/O interface (support normal input, pull up/down input, push-pull output, leakage opening output and can configure edge/level triggered interrupt), timer (6-bit windowed watchdog timer, 32-bit watchdog timer, 2 programmable timer), SPI, I2C, UART, PWM, CCP, ADC, ACMP, OPA, PGA and other devices. Their main features are as follows:
◆Max. 32KB FLASH memory space, max. 8KB SRAM memory,1KB FLASH data space.
◆Support BOOT and separated write protection of programs, support hardware CRC verification of FLASH spatial code, register protection with user defined ID, hence it is more secure.
◆Provide choice of normal mode, sleep mode, deep sleep mode, stop mode. It is more convenient and less power consuming.
◆Contain 32 bit hardware divider and 32 bit single period hardware multiplier to achieve faster calculation
◆Can configure any I/O interface as serial transmit/receive interface meanwhile, it can configure any I/O interface as input interface of ADC. Therefore, it is more convenient.
◆Contains enhanced PWM with dead time insertion, duty cycle interval update and individual/ complementary/ synchronized output.
◆Contains strong analog IP such as 12 bit ADC with max. 1.2Msps, support analog comparator with choice hysteresis, programmable gain amplifier with adjustable gain and operational amplifier.

Cmsemicon

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32-bit motor microcontroller

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Datasheet

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SSOP24;LQFP32;QFN40;SOP16;TSSOP24;LQFP48

English Chinese Chinese and English Japanese

Oct 2022

Rev. 1.14

5.1 MB

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