NVMe IP for Gen4/NVMeG4-IP demo instruction
■ This document describes the instruction to run NVMe-IP for Gen4/NVMeG4-IP demo on FPGA development board. One NVMe SSD is accessed for running the demo. There are six commands that can run, i.e., Identify, Write, Read, SMART, Flush and Shutdown command. User controls test operation via FPGA console .
■ After user finishes FPGA board setup following “dg_nvmeip_fpgasetup” document, main menu is displayed and the user sets the input to the console for selecting test operation.
■ On welcome screen, IP name and IP version number are displayed. For standard IP (NVMe-IP) the PCIe speed and number of PCIe lanes are displayed in the next message. While NVMeG 4-IP does not display because only 4-lane PCIe Gen4 SSD is supported. The last message shows the test menu in the demo.
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User's Guide |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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14-Sep-21 |
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Rev 1.4 |
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1.7 MB |
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