raNVMe-IP reference design manual
●NVM Express (NVMe) defines the interface for the host controller to access solid state drive (SSD) by PCI Express. NVM Express optimizes the process to issue command and completion by using only two registers (Command issue and Command completion). Also, NVMe supports parallel operation by supporting up to 64K commands within single queue. 64K command entries improve transfer performance for both sequential and random access.
●In PCIe SSD market, two standards are used, i.e. AHCI and NVMe. AHCI is the older standard to provide the interface for SATA hard disk drive while NVMe is optimized for non-volatile memory like SSD.
●NVMe-IP is the host controller for accessing one NVMe SSD without integrating CPU or external memory. To achieve the best performance for write and read access, NVMe-IP is designed to store the data in NVMe SSD as contiguous area. Transfer size per command is normally large for storing data streaming and the user can send only one command to NVMe-IP at a time.So, NVMe-IP is not proper for some applications which need to store many data types with small size to the different area in the same SSD.
●raNVMe-IP is the NVMe-IP which is modified to support up to 32 Write or Read commands with 4 Kbyte data size at the same time. As shown in Figure 1-1, the data stored in the SSD when using raNVMe-IP can be scattered in the SSD while the data in the SSD is contiguous area when using NVMe-IP.Though raNVMe-IP can operate many commands with the different area, the user application can implement raNVMe-IP with assigning the sequential address for comparable with NVMe-IP. The result performance when running sequential addressing by using raNVMe-IP is reduced from NVMe-IP because of the smaller internal buffer size.
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Application note & Design Guide |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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12-Jan-21 |
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Rev1.2 |
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1 MB |
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