Holtek 32-Bit Microcontroller with Arm® Cortex®-M3 Core HT32F12365/HT32F12366/HT32F22366User Manual
2021-08-16
Overview:
This user manual provides detailed information including how to use the HT32F12365.12366 22366 devices, system and bus architecture, memory organization and peripheral instructions. The
target audiences for this document are software developers, application developers and hardware developers. For more information regarding pin assignment, package and electrical characteristics, please refer to the HT32F12365.12366.22366 datasheet.
The HT32F12365.12366 22366 devices are high performance and low power consumption 32-bit microcontrollers based around an Arm® Cortex®-M3 processor core. The Cortex®-M3® is a next-
generation processor core which is tightly coupled with Nested Vectored Interrupt Controller (NVIC). SysTick timer, and including advanced debug support.
The HT32F12365.12366 22366 devices operate at a frequency of up to 96 MHz with a Flash accelerator to obtain maximum efficiency. It provides 256 KB of embedded Flash memory for code/data storage and up to 128 KB of embedded SRAM memory for system operation and application program usage. A variety of peripherals, such as ADC, I²C, USART, UART, SPI, I²S, PDMA, GPTM, MCTM,SCI, EBI, CRC-16 32, AES-128 256, USB2.0 FS, SDIO, CSIF and SWJDP (Serial Wire JTAG Debug Port), etc., are also implemented in the device series. Several power saving modes provide the flexibility for maximum optimization between wakeup latency and power consumption, an especially important consideration in low power applications.
The above features ensure that the HT32F12365 12366 22366 devices are suitable for use in a wide range of applications, especially in areas such as w:hite goods application control, power monitors, alarm systems, consumer products, handheld equipment, data logging applications, motor control, fingerprint recognition and so on.
▲Features
■ Core
● 32-bit Arm® Cortex®-M3 processor core
● Up to 96 MHz operation frequency
● Single-cycle multiplication and hardware division
● Integrated Nested Vectored Interrupt Controller (NVIC)
● 24-bit SysTick timer
■ On-chip Memory
● 256 KB on-chip Flash memory for instruction data and options storage
● Up to 128 KB on-chip SRAM
● Supports multiple booting modes
■ Flash Memory Controller - FMC
● Flash accelerator to obtain maximum efficiency
● 32-bit word programming with In System Programming Interface (ISP) and In Application
Programming (LAP)
● Flash protection capability to prevent illegal access
■ Reset Control Unit - RSTCU
● Supply supervisor: Power On Reset /Power Down Reset (POR PDR), Brown-out Detector:
(BOD) and Programmable Low Voltage Detector (LVD)
■ Clock Control Unit - CKCU
● External 4 to 16 MHz crystal oscillator
● External 32.768 kHz crystal oscillator
● Internal 8 MHz RC oscillator trimmed to ±2 % accuracy at 3.3 V operating voltage and 25 °C
operating temperature
● Internal 32 kHz RC oscillator
● Integrated system clock PLL and USB PLL
● Independent clock divider and gating bits for peripheral clock sources
■ Power Management - PWRCU
● Single VDD power supply: 2.0 V to 3.6 V
● Integrated 1.5V LDO regulator for CPU core, peripherals and memories power supply
● VBAT battery power supply for RTC and backup registers
● Three power domains: VDD, 1.5 V and Backup
● Four power saving modes: Sleep. Deep-Sleep1. Deep-Sleep2. Power-Down
■External Interrupt Event Controller - EXTI
● Up to 16 EXTI lines with configurable trigger source and type
● All GPIO pins can be selected as EXTI trigger source
● Source trigger type includes high level, low level, negative edge, positive edge or both edge
● Individual interrupt enable, wakeup enable and status bits for each EXTI line
● Software interrupt trigger mode for each EXTI line
● Integrated deglitch filter for short pulse blocking
■ Analog to Digital Converter - ADC
● 12-bit SAR ADC engine
● Up to 1 MSPS conversion rate
● Up to 16 external analog input channels
● External reference voltage input possibility
● Conversion range: Vref+ ~ Vref-.
■ Analog Comparator - CMP
● Rail-to-rail comparator
● Each comparator has configurable negative inputs used for flexible voltage selection
● Dedicated I/O pin or internal voltage reference provided by 6-bit scaler.
● Programmable hysteresis
● Programming speed and consumption
● Comparator output can be output to I/O or to timers or ADC trigger inputs
● 6-bit scaler can be configurable to dedicated I/O for voltage reference.
● Comparator has interrupt generation capability with wakeup from Sleep or Deep Sleep modes
through the EXTI controller.
■ I/O Ports-GPIO
● Up to SOGPIOs
● Port A ~ E are mapped on 16 external interrupts (EXTI)
● Almost IO pins are configurable output driving current
■ Motor Control Timer - MCTM
● 16-bit up, down, up down auto-reload counters
● Up to 4 independent channels for each timer
● 16-bit programmable prescaler allowing dividing the counter clock frequency by any factor
between 1 and 65536
● Input Capture function
● Compare Match Output
● PWM waveform generation with Edge-aligned and Center-aligned Counting Modes
● Single Pulse Mode Output
● Complementary Outputs with programmable dead-time insertion
● Supports 3-phase motor control and hall sensor interface
● Break input to force the timer’s output signals into a reset or fixed condition
■General-Purpose Timer – GPTM
● 16-bit up, down, up/down auto-reload counters
● Up to 4 independent channels for each timer
● 16-bit programmable prescaler allowing dividing the counter clock frequency by any factor
between 1 and 65536
● Input Capture function
● Compare Match Output
● PWM waveform generation with Edge-aligned and Center-aligned Counting Modes
● Single Pulse Mode Output
● Encoder interface controller with two inputs using quadrature decoder Basic Function Timer - BFTM
■Basic Function Timer – BFTM
● 32-bit compare/match count-up counters - no TO control features
● One shot mode - counting stops after a match condition
● Repetitive mode - restart counter after a match condition
■ Watchdog Timer - WDT
● 12-bit down counter with 3-bit prescaler
● Interrupt or reset event for the system
● Programmable watchdog timer window function
● Registers write protection function
■ Real Time Clock - RTC
● 32-bit up-counter with a programmable prescaler
● Alarm function
● Interrupt and Wake-up event
■ Inter-integrated Circuit – I2C
● Supports both master and slave modes with a frequency of up to 1 MHz
● Provides an arbitration function and clock synchronization
● Supports 7-bit and 10-bit addressing modes and general call addressing
● Supports slave multi-addressing mode with maskable address
Serial Peripheral Interface - SPI
● Supports both master and slave mode
● Frequency of up to (fpcLK /2) MHz for master mode and (fpcLK/3) MHz for slave mode
● FIFO Depth: 8 levels
● Multi-master and multi-slave operation
■ Universal Synchronous Asynchronous Receiver Transmitter - USART
● Supports both asynchronous and clocked synchronous serial communication modes
● Asynchronous operating baud rate clock frequency of up to (fpcLK /16) MHz and synchronous
operating baud rate clock frequency of up to (fpcLK /8) MHz
● Capability of full duplex communication
● Fully programmable characteristics of serial communication including: word length, parity bit.
stop bit and bit order
● Error detection: Parity, overrun and frame error
● Supports Auto hardware flow control mode - RTS, CTS
● IrDA SIR encoder and decoder
● RS485 mode with output enable control
● FIFO Depth: 8-level for both receiver and transmitter
■ Universal Asynchronous Receiver Transmitter - UART
● Asynchronous serial communication operating baud rate clock frequency of up to (fpcLK/16)
MHz
● Capability of full duplex communication
● Fully programmable characteristics of serial communication including: word length, parity bit.
stop bit and bit order
● Error detection: Parity, overrun and frame error
■ Smart Card Interface - SCI
● Supports ISO 7816-3 Standard
● Character Transfer mode
● Single transmit buffer and single receive buffer
● 11-bit ETU (Elementary Time Unit) counter
● 9-bit guard time counter
● 24-bit general purpose waiting time counter
● Parity generation and check functions
● Automatic character retry on parity error detection in transmission and reception modes
■ Inter-IC Sound-I2S
● Master or slave mode
● Mono and stereo
● I2S-justified. Left-justified, and Right-justified mode
● 8/16 24 32-bit sample size with 32-bit channel extended
● 8 x 32-bit TX & RX FIFO with PDMA supported
● 8-bit Fractional Clock Divider with rate control
■ Cyclic Redundancy Check - CRC
● Supports CRC 16 polynomial: 0x8005, Xltf-X15+X2+1
● Supports CCITT CRC 16 polynomial: 0x1021, Xl6+Xu+X5-l
● Supports IEEE-802.3 CRC32 polynomial: 0x04CllDB7, X32+X26+X23+X22+X16+X12+X10
+X8+X7+X5+X4-X2+X+1
● Supports 1 ;s complement, byte reverse & bit reverse operation on data and checksum
● Supports byte, half-word & word data size
● Programmable CRC initial seed value
● CRC computation done in 1 AHB clock cycle for 8-bit data and 4 AHB clock cycles for 32-bit data
● Supports PDMA to complete a CRC computation of a block of memory
■ Peripheral Direct Memory Access - PDMA
● 12 channels with trigger source grouping
● 8.16/3 2-bit width data transfer
● Supports Address increment, decrement or fixed mode
● 4-level programmable channel priority
● Auto reload mode
● Supports trigger source: ADC, SPI, EBI, CRC, USART, UART, I2C, I2S, GPTM, MCTM. SCI,
AES, SDIO and software request
■ External Bus Interface - EBI
● Programmable interface for various memory types
● Translates the AHB transactions into the appropriate external device protocol
● 4 Memory bank regions and independent chip select control for each memory bank
● Accurate control of setup, strobe, hold and turn-around timing per memory bank
● Supports page mode read
● Automatic translation when AHB transaction width and external memory interface width is
different
● Write buffer to decrease the stalling of the AHB write burst transaction
● Both multiplexed and non-multiplexed address and data line configurations
– Up to 25 address lines
– Up to 16-bit data bus width
■ Universal Serial Bus Device Controller - USB
● Complies with USB 2.0 full-speed (12 Mbps) specification
● On-chip USB full-speed transceiver
● 1 control endpoint (EPO) for control transfer
● 3 single-buffered endpoint (EP1-EP3) for bulk and interrupt transfer
● 4 double-buffered endpoint (EP4^EP7) for bulk, interrupt and isochronous transfer
● 1 KB EP_SRAM used as the endpoint data buffers
■ Advanced Encryption Standard -AES
● Supports AES Encrypt / Decrypt Function
● Supports AES ECB CBC CTR mode
● Supports Key Sizes of 128; 192 and 256 bits
● Supports 4 words Initial Vector for CBC and CTR mode
● 8 x 32 bits ( Each IN and OUT FIFO Capacity ) for 2 AES Data blocks
● Supports Word Data Swap Function
● Supports PDMA Interface
■ Secure Digital Input Output Interface - SDIO
● Supports two different data bus modes: 1-bit (default) and 4-bit
● Supports two different speed modes: Normal speed (default) and High speed
● SD clock frequency of up to system frequency
● SPI mode and MMC stream mode not supported
■ CMOS Sensor Interface - CSIF (HT32F22366 Only)
● Up to 2048 x 2048 input resolution
● Supports 8-bit YUV422 and Raw RGB formats
● Up to (fHCLK /3) MHz input pixel clock frequency
● VSYNC and HSYNC various settings for image capture
● Hardware window capture function
● Fractional hardware sub-sample function
● Dual FIFOs each with a capacity of 8 × 32 bits which can be read by PDMA or CPU
■Debug support
● Serial Wire JTAG Debug Port SWJ-DP
● 6 instruction comparators and 2 literal comparators for hardware breakpoint/watchpoint or
code patch
● 1-bit asynchronous trace (TRACESWO)
■Package and Operation Temperature
● 46-pin QFN, 48/64/100-pin LQFP packages
● Operation temperature range: -40 °C to 85 °C
This user manual provides detailed information including how to use the HT32F12365.12366 22366 devices, system and bus architecture, memory organization and peripheral instructions. The
target audiences for this document are software developers, application developers and hardware developers. For more information regarding pin assignment, package and electrical characteristics, please refer to the HT32F12365.12366.22366 datasheet.
The HT32F12365.12366 22366 devices are high performance and low power consumption 32-bit microcontrollers based around an Arm® Cortex®-M3 processor core. The Cortex®-M3® is a next-
generation processor core which is tightly coupled with Nested Vectored Interrupt Controller (NVIC). SysTick timer, and including advanced debug support.
The HT32F12365.12366 22366 devices operate at a frequency of up to 96 MHz with a Flash accelerator to obtain maximum efficiency. It provides 256 KB of embedded Flash memory for code/data storage and up to 128 KB of embedded SRAM memory for system operation and application program usage. A variety of peripherals, such as ADC, I²C, USART, UART, SPI, I²S, PDMA, GPTM, MCTM,SCI, EBI, CRC-16 32, AES-128 256, USB2.0 FS, SDIO, CSIF and SWJDP (Serial Wire JTAG Debug Port), etc., are also implemented in the device series. Several power saving modes provide the flexibility for maximum optimization between wakeup latency and power consumption, an especially important consideration in low power applications.
The above features ensure that the HT32F12365 12366 22366 devices are suitable for use in a wide range of applications, especially in areas such as w:hite goods application control, power monitors, alarm systems, consumer products, handheld equipment, data logging applications, motor control, fingerprint recognition and so on.
▲Features
■ Core
● 32-bit Arm® Cortex®-M3 processor core
● Up to 96 MHz operation frequency
● Single-cycle multiplication and hardware division
● Integrated Nested Vectored Interrupt Controller (NVIC)
● 24-bit SysTick timer
■ On-chip Memory
● 256 KB on-chip Flash memory for instruction data and options storage
● Up to 128 KB on-chip SRAM
● Supports multiple booting modes
■ Flash Memory Controller - FMC
● Flash accelerator to obtain maximum efficiency
● 32-bit word programming with In System Programming Interface (ISP) and In Application
Programming (LAP)
● Flash protection capability to prevent illegal access
■ Reset Control Unit - RSTCU
● Supply supervisor: Power On Reset /Power Down Reset (POR PDR), Brown-out Detector:
(BOD) and Programmable Low Voltage Detector (LVD)
■ Clock Control Unit - CKCU
● External 4 to 16 MHz crystal oscillator
● External 32.768 kHz crystal oscillator
● Internal 8 MHz RC oscillator trimmed to ±2 % accuracy at 3.3 V operating voltage and 25 °C
operating temperature
● Internal 32 kHz RC oscillator
● Integrated system clock PLL and USB PLL
● Independent clock divider and gating bits for peripheral clock sources
■ Power Management - PWRCU
● Single VDD power supply: 2.0 V to 3.6 V
● Integrated 1.5V LDO regulator for CPU core, peripherals and memories power supply
● VBAT battery power supply for RTC and backup registers
● Three power domains: VDD, 1.5 V and Backup
● Four power saving modes: Sleep. Deep-Sleep1. Deep-Sleep2. Power-Down
■External Interrupt Event Controller - EXTI
● Up to 16 EXTI lines with configurable trigger source and type
● All GPIO pins can be selected as EXTI trigger source
● Source trigger type includes high level, low level, negative edge, positive edge or both edge
● Individual interrupt enable, wakeup enable and status bits for each EXTI line
● Software interrupt trigger mode for each EXTI line
● Integrated deglitch filter for short pulse blocking
■ Analog to Digital Converter - ADC
● 12-bit SAR ADC engine
● Up to 1 MSPS conversion rate
● Up to 16 external analog input channels
● External reference voltage input possibility
● Conversion range: Vref+ ~ Vref-.
■ Analog Comparator - CMP
● Rail-to-rail comparator
● Each comparator has configurable negative inputs used for flexible voltage selection
● Dedicated I/O pin or internal voltage reference provided by 6-bit scaler.
● Programmable hysteresis
● Programming speed and consumption
● Comparator output can be output to I/O or to timers or ADC trigger inputs
● 6-bit scaler can be configurable to dedicated I/O for voltage reference.
● Comparator has interrupt generation capability with wakeup from Sleep or Deep Sleep modes
through the EXTI controller.
■ I/O Ports-GPIO
● Up to SOGPIOs
● Port A ~ E are mapped on 16 external interrupts (EXTI)
● Almost IO pins are configurable output driving current
■ Motor Control Timer - MCTM
● 16-bit up, down, up down auto-reload counters
● Up to 4 independent channels for each timer
● 16-bit programmable prescaler allowing dividing the counter clock frequency by any factor
between 1 and 65536
● Input Capture function
● Compare Match Output
● PWM waveform generation with Edge-aligned and Center-aligned Counting Modes
● Single Pulse Mode Output
● Complementary Outputs with programmable dead-time insertion
● Supports 3-phase motor control and hall sensor interface
● Break input to force the timer’s output signals into a reset or fixed condition
■General-Purpose Timer – GPTM
● 16-bit up, down, up/down auto-reload counters
● Up to 4 independent channels for each timer
● 16-bit programmable prescaler allowing dividing the counter clock frequency by any factor
between 1 and 65536
● Input Capture function
● Compare Match Output
● PWM waveform generation with Edge-aligned and Center-aligned Counting Modes
● Single Pulse Mode Output
● Encoder interface controller with two inputs using quadrature decoder Basic Function Timer - BFTM
■Basic Function Timer – BFTM
● 32-bit compare/match count-up counters - no TO control features
● One shot mode - counting stops after a match condition
● Repetitive mode - restart counter after a match condition
■ Watchdog Timer - WDT
● 12-bit down counter with 3-bit prescaler
● Interrupt or reset event for the system
● Programmable watchdog timer window function
● Registers write protection function
■ Real Time Clock - RTC
● 32-bit up-counter with a programmable prescaler
● Alarm function
● Interrupt and Wake-up event
■ Inter-integrated Circuit – I2C
● Supports both master and slave modes with a frequency of up to 1 MHz
● Provides an arbitration function and clock synchronization
● Supports 7-bit and 10-bit addressing modes and general call addressing
● Supports slave multi-addressing mode with maskable address
Serial Peripheral Interface - SPI
● Supports both master and slave mode
● Frequency of up to (fpcLK /2) MHz for master mode and (fpcLK/3) MHz for slave mode
● FIFO Depth: 8 levels
● Multi-master and multi-slave operation
■ Universal Synchronous Asynchronous Receiver Transmitter - USART
● Supports both asynchronous and clocked synchronous serial communication modes
● Asynchronous operating baud rate clock frequency of up to (fpcLK /16) MHz and synchronous
operating baud rate clock frequency of up to (fpcLK /8) MHz
● Capability of full duplex communication
● Fully programmable characteristics of serial communication including: word length, parity bit.
stop bit and bit order
● Error detection: Parity, overrun and frame error
● Supports Auto hardware flow control mode - RTS, CTS
● IrDA SIR encoder and decoder
● RS485 mode with output enable control
● FIFO Depth: 8-level for both receiver and transmitter
■ Universal Asynchronous Receiver Transmitter - UART
● Asynchronous serial communication operating baud rate clock frequency of up to (fpcLK/16)
MHz
● Capability of full duplex communication
● Fully programmable characteristics of serial communication including: word length, parity bit.
stop bit and bit order
● Error detection: Parity, overrun and frame error
■ Smart Card Interface - SCI
● Supports ISO 7816-3 Standard
● Character Transfer mode
● Single transmit buffer and single receive buffer
● 11-bit ETU (Elementary Time Unit) counter
● 9-bit guard time counter
● 24-bit general purpose waiting time counter
● Parity generation and check functions
● Automatic character retry on parity error detection in transmission and reception modes
■ Inter-IC Sound-I2S
● Master or slave mode
● Mono and stereo
● I2S-justified. Left-justified, and Right-justified mode
● 8/16 24 32-bit sample size with 32-bit channel extended
● 8 x 32-bit TX & RX FIFO with PDMA supported
● 8-bit Fractional Clock Divider with rate control
■ Cyclic Redundancy Check - CRC
● Supports CRC 16 polynomial: 0x8005, Xltf-X15+X2+1
● Supports CCITT CRC 16 polynomial: 0x1021, Xl6+Xu+X5-l
● Supports IEEE-802.3 CRC32 polynomial: 0x04CllDB7, X32+X26+X23+X22+X16+X12+X10
+X8+X7+X5+X4-X2+X+1
● Supports 1 ;s complement, byte reverse & bit reverse operation on data and checksum
● Supports byte, half-word & word data size
● Programmable CRC initial seed value
● CRC computation done in 1 AHB clock cycle for 8-bit data and 4 AHB clock cycles for 32-bit data
● Supports PDMA to complete a CRC computation of a block of memory
■ Peripheral Direct Memory Access - PDMA
● 12 channels with trigger source grouping
● 8.16/3 2-bit width data transfer
● Supports Address increment, decrement or fixed mode
● 4-level programmable channel priority
● Auto reload mode
● Supports trigger source: ADC, SPI, EBI, CRC, USART, UART, I2C, I2S, GPTM, MCTM. SCI,
AES, SDIO and software request
■ External Bus Interface - EBI
● Programmable interface for various memory types
● Translates the AHB transactions into the appropriate external device protocol
● 4 Memory bank regions and independent chip select control for each memory bank
● Accurate control of setup, strobe, hold and turn-around timing per memory bank
● Supports page mode read
● Automatic translation when AHB transaction width and external memory interface width is
different
● Write buffer to decrease the stalling of the AHB write burst transaction
● Both multiplexed and non-multiplexed address and data line configurations
– Up to 25 address lines
– Up to 16-bit data bus width
■ Universal Serial Bus Device Controller - USB
● Complies with USB 2.0 full-speed (12 Mbps) specification
● On-chip USB full-speed transceiver
● 1 control endpoint (EPO) for control transfer
● 3 single-buffered endpoint (EP1-EP3) for bulk and interrupt transfer
● 4 double-buffered endpoint (EP4^EP7) for bulk, interrupt and isochronous transfer
● 1 KB EP_SRAM used as the endpoint data buffers
■ Advanced Encryption Standard -AES
● Supports AES Encrypt / Decrypt Function
● Supports AES ECB CBC CTR mode
● Supports Key Sizes of 128; 192 and 256 bits
● Supports 4 words Initial Vector for CBC and CTR mode
● 8 x 32 bits ( Each IN and OUT FIFO Capacity ) for 2 AES Data blocks
● Supports Word Data Swap Function
● Supports PDMA Interface
■ Secure Digital Input Output Interface - SDIO
● Supports two different data bus modes: 1-bit (default) and 4-bit
● Supports two different speed modes: Normal speed (default) and High speed
● SD clock frequency of up to system frequency
● SPI mode and MMC stream mode not supported
■ CMOS Sensor Interface - CSIF (HT32F22366 Only)
● Up to 2048 x 2048 input resolution
● Supports 8-bit YUV422 and Raw RGB formats
● Up to (fHCLK /3) MHz input pixel clock frequency
● VSYNC and HSYNC various settings for image capture
● Hardware window capture function
● Fractional hardware sub-sample function
● Dual FIFOs each with a capacity of 8 × 32 bits which can be read by PDMA or CPU
■Debug support
● Serial Wire JTAG Debug Port SWJ-DP
● 6 instruction comparators and 2 literal comparators for hardware breakpoint/watchpoint or
code patch
● 1-bit asynchronous trace (TRACESWO)
■Package and Operation Temperature
● 46-pin QFN, 48/64/100-pin LQFP packages
● Operation temperature range: -40 °C to 85 °C
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[ white goods application control ][ power monitors,alarm systems ][ consumer products ][ handheld equipment ][ data logging applications ][ motor control ][ fingerprint recognition ] |
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User's Guide |
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Please see the document for details |
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QFN;LQFP |
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English Chinese Chinese and English Japanese |
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September 09, 2020 |
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Rev. 1.20 |
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6.9 MB |
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