Structure and Principle of N-channel Depleted Field Effect Transistor (MOS)
In this article, LX MICRO will introduce the structure and principle of the n-channel depleted field effect transistor (MOS).
The depleted MOS FET is fabricated by doping a large amount of positive ions into the insulating layer of the silicon dioxide, thus, even without a voltage applied to the gate (UGS = 0), due to electrostatic induction, the field generated by these positive ions can“Induce” enough negative charge in the p-type substrate to form an“Inversion layer”, n-type conductive channels are produced.
When a positive voltage is applied to the gate (UGS > 0), the channel widens and the ID increases, whereas when a negative voltage is applied to the gate (UGS < 0), the channel narrows and the ID decreases. When the gate negative voltage reaches a certain value VP (pinch off voltage). Will make the inversion layer disappear, ID = 0.
FET is short for Field-effect transistor. There are two main types of junction FET-JFET and mos-FET. Most carriers conduct electricity, also known as unipolar transistors.
What Are the Advantages of Mos Fet?
Field-effect transistors (MOS) are voltage-controlled semiconductor device. It has the advantages of high input resistance, low noise, low power consumption, large dynamic range, easy integration, no secondary breakdown and wide safe operating area range.
Characteristics of FET:
1. FET is a voltage control device. It controls the ID (drain current) through VGS (gate source voltage) .
2. The control input current of FET is very small, so its input resistance is very large.
3. It uses most carriers to conduct electricity, so its temperature stability is good.
4. The voltage magnification factor of the amplifier circuit is smaller than the voltage magnification factor of the amplifier circuit composed of the triode.
5. Fet has strong radiation resistance.
6. The noise is low because the diffusion of the moving electrons causes no shot noise.
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