CW32L031 ARM® Cortex®-M0+ Low-power 32-bit MCU Reference Manual

2023-12-28
■System architecture
●The consists of CW32L031 microcontroller system contains:
▲2 master device:
◆ARM® Cortex®-M0+ core
◆General-purpose DMA
▲Multiple slave device:
◆On-chip SRAM
◆On-chip FLASH
◆FLASH controller
◆CRC redundancy calculation unit
◆GPIO port
◆AHB to APB1 conversion bridge and all devices on the APB1 bus
◆AHB to APB2 conversion bridge and all devices on the APB2 bus
◆AHB to APB3 conversion bridge and all devices on the APB3 bus
◆AHB to APB4 conversion bridge and all devices on the APB4 bus

CW

CW32L031CW32L031 seriesCW32L031C8T6-LQFP48

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ARM® Cortex®-M0+ Low-power 32-bit MCUMCUmicrocontroller system

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User's Guide

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LQFP48

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May 18, 2023

Rev 1.0

21.4 MB

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