BAT32A2x9 User Manual An ultra-low-power 32-bit microcontroller based on the ARM® Cortex®-M0+
■The ARM Cortex-M0+ processor is a 32-bit RISC core with a 2-level pipeline that supports both privileged mode and user mode
■The Memory Protection Unit (MPU) supports 8 independent partitions (regions) for protection
■Single-cycle hardware multiplier
■Nested Vector Interrupt Controller (NVIC)
▲1 Unshielded Interrupt (NMI).
▲Supports 32 maskable interrupt requests (IRQs).
▲4 interrupt priorities
■The system timer SysTick is a 24-bit countdown timer with the option of fCLK or fIL counting clocks
■Vector Table Offset Register (VTOR).
▲The software can write the VTOR to relocate the vector table start address to a different location
▲Default value of this register is 0x0000_0000, low 8 bits write ignore, read to zero, that is, offset 256 bytes aligned
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BAT32A2x9 、 BAT32A239 、 BAT32A279 、 BAT32A239xx 、 BAT32A279xx |
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User's Guide |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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Feb 2023 |
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Rev 1.0.2 |
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60.5 MB |
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