AN-501 Power-Up/Down Considerations in NOR Flash
●Flash memory devices are widely used components in microcontroller systems as regular companions to MCUs. Compared to MCUs, complex PMICs, and other SoCs, Flash memory is perceived to be a rather simple device. For example, a typical serial Flash device is commonly housed in an eight-pin package, contains two data pins (in and out), and communicates with the MCU over a simple four-wire SPI protocol. Such perceived simplicity, however, can be deceiving. Some important system design requirements specific to NOR Flash, such as proper power-up sequencing, can be overlooked. Under certain conditions, this can lead to unexpected and undesirable system operation.
●The purpose of this document is to create awareness of the importance of proper system design with respect to an important element of correct NOR Flash memory operation: the correct power-up and power-down sequencing.
●The importance of a correct power-up sequencing (often referred to as "VCC ramp") is described in more detail in Chapter2.
●Chapter 3 discusses hardware and software reset.
●Even when a Flash device is powered up correctly, it can still be susceptible to varying voltage levels that can occur during device operation, such as a brown-out condition. The consequences of brown-out, recovering from it, and avoiding it are described in Chapter4.
●Power-down is discussed in Chapter 5.
●Power cycling, as well as entering and exiting a variety of power saving modes represents its own challenges, which are discussed in Chapter6.
●The Appendix describes a variety of methods of executing a reset.
●Additional information regarding VCC Power Off, Brownout, and Power-On with the DataFlash® Family can be found in Application Note ADAPP001A-DFLASH-5/13.
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Application note & Design Guide |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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09-2021 |
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Revision A2 |
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AN-501 |
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1.2 MB |
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