FPGA Setup for TOE/UDP1G IP with CPU Demo

PublishTime：2022-04-29

●This document describes how to setup FPGA board and prepare the test environment for running TOE1G-IP or UDP1G-IP demo. The user can setup two test environments for transferring TCP data or UDP data via 1Gb Ethernet connection by using TOE1G-IP or UDP1G-IP, as shown in Figure 1-1.
●First uses one FPGA board and Test PC with 1Gb Ethernet card for transferring the data. TestPC runs test application, i.e.,tcpdatatest (half-duplex test for TOE1G-IP),tcp_client_txrx_40G for (full-duplex test for TOE1G-IP)or udpdatatest (test application for UDP1G-IP).Also, NiosII command shell is run on Test PC to be user interface console.
●Second uses two FPGA boards which may be different board or the same board. Both boards run TOE1G-IP or UDP1G-IP demo with assigning the different initialization mode (Client for Server) for transferring data.

Brand of Product：	Design Gateway
Part#：	UDP1G IP 、 TOE1G IP 、 TOE1G-IP 、 UDP1G-IP More Part#
Product Category：	IP core More
Application：	More
Data Type：	User's Guide More
Safety & Environment Standards：	More
Operating Temperature：	Please see the document for details
Qualification Grade：	More
Qualification Approval：	More
Package：
Language：	English Chinese Chinese and English Japanese
Date of Creation：	11-Feb-21
Version Number：	Rev2.0
Data Encoding：
Data Size：	2.9 MB

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