UDP40G-IP Demo Instruction
■The demo is designed to run UDP40G-IP for transferring 40Gb Ethernet data by using UDP/IP protocol. Two test environments can be setup for the demo, as shown in Figure 1-1. First test environment (Test Env#A) uses one FPGA board transferring data with TestPC. More details to run the demo by using FPGA and TestPC are described in PartA.Second test environment (Test Env#B) uses two FPGA boards to transfer data between the 1st FPGA and the 2nd FPGA. More details to run the demo by using two FPGAs are described in PartB.
■User interface for setting test parameters on FPGA and monitoring hardware status is JTAG UART.
■“udpdatatest” is test application to run on TestPC for transferring data with FPGA by using UDP/IP protocol. The input parameters of “udpdatatest” by user are transfer direction (transmit or receive data), transfer size, network parameters, and test mode. Half-duplex test with UDP40G-IP is operated by running one “udpdatatest” application on Windows command prompt (PC)while Full-duplex test with UDP40G-IP is operated by running two “udpdatatest”applications on two Windows command prompts (PC).Two applications for full-duplex test must run in different transfer direction(one for sending data and another for receiving data) by using different port number.
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User's Guide |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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28-Oct-19 |
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Rev 1.0 |
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7.5 MB |
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