NVMeTCP IP Core for 10G Product Specification
■ NVMe/TCP (NVMe over TCP) host controller (Initiator), based on NVMe-oF specification rev 1.1 and NVMe specification rev 1.4
■ Access one NVMe SSD on the target (Subsystem), selected by NVMe name (NQN)
■ Command: Write and Read
■ High performance: Write at 1200 Mbyte/s and Read at 1200 Mbyte/s (1Mbyte buffer) or less
■ Data interface: Memory-mapped interface
■ Data size per command: Fixed at 4 Kbytes
■ Maximum command: 256 or less, limited by Read buffer size for Read command
■ Configurable Read buffer size: 32Kbytes (up to 8 Read Cmd) - 1Mbytes (up to 256 Read Cmd)
■ Supported NVMe/TCP target:
▲ IOCCSZ (I/O Queue Command Capsule Support Size): More than or equal to 4160 (1040h)
▲ MQES (Maximum Queue Entries Supported): More than or equal to 256 (100h)
▲ MAXCMD (Maximum Outstanding Commands): More than or equal to 256 (100h)
▲ Authentication: Not required
■ Networking: 10Gb Ethernet speed in the same network for transferring ARP request/reply packet by using jumbo frame packet
■ Ethernet MAC interface: 64-bit AXI4 Stream interface at 156.25 MHz
■ User clock frequency: 156.25 MHz, the same clock as EMAC interface
■ Available reference design: KCU105/ZCU102/ZCU106 board
■ Customized service
▲ NVMe/TCP Target in different network that cannot transfer ARP packet to get Target MAC address
▲ The network that does not support jumbo frame packet
● General Description:
■ NVMeTCP10G IP implements the host controller (another name is NVMe/TCP initiator) to access one SSD inside NVMe/TCP target (another name is NVMe/TCP subsystem) via 10Gb Ethernet. The user interface of NVMeTCP10G IP is divided into three groups, i.e., Parameters interface, Control interface, and Memory map interface. Parameter interface is applied to assign the network parameters and timeout value of NVMeTCP10G IP during connection establishment process. Control interface is applied for creating and terminating the connection with the target system. Also, the status and error are included in Control interface for IP monitoring. Last, Memory map interface is applied for sending Write and Read command and transferring data of Write and Read command.
■ To connect the NVMe/TCP target, two TCP ports are established by NVMeTCP10G IP. The first port is the Admin connection to handle connection establishment and termination. Also, Keep alive command is transmitted in this port to keep the connection active. While the second port is the IO connection to handle Write command and Read command. Therefore, two TCP ports are controlled independently by using two TCP/IP controllers and two Command Handlers. EMAC I/F is the port multiplexer for transferring Ethernet packet of two TCP ports to one EMAC.
■ According to NVMe/TCP protocol, NVMe/TCP Protocol Data Units (PDU) is assigned to be TCP Payload in TCP/IP packet for transferring between the host system and the target system via TCP/IP protocol which is the reliable protocol for networking data transferring. One TCP packet may consists of one PDU, many PDUs, or a part of PDU. Therefore, the NVMe/TCP processor and the TCP/IP processor to handle PDU and TCP/IP packet must be designed seperately. As shown in Figure 2, Admin/IO command handlers are designed to create and decode PDU following NVMe/TCP protocol while Admin/IO TCP/IP controllers are designed to create and decode TCP/IP packet following TCP/IP protocol.
■ Register File is the interface module for receiving the user parameters to start the connection establishment. Besides, there is Read buffer for re-orderring the received data in Read command to have the same sequence as the requested order. IO command handler is designed to support up to 256 Write/Read commands. However, the maximum command in the queue is also limited by Read buffer size. When Read buffer is full, the IP is not ready to receive the new Write/Read command. Read buffer size can be adjusted to balance the resource utilization and read performance. Larger buffer size may increase the read performance because maximum number of queues to send Read command is increased.
■ NVMeTCP10G IP runs in one clock domain that is synchronous to EMAC interface, 156.25 MHz for 10Gb Ethernet speed. The EMAC interface of NVMeTCP10G IP can be connected to DG 10G25GEMAC IP directly while special logic (TenGMacIF) must be included in Tx EMAC interface for connecting NVMeTCP10G IP to 10G/25G Ethernet Subsystem, Xilinx IP core.
■ The reference design on FPGA evaluation boards are available for evaluation before purchasing.
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XCKU040FFVA1156-2E 、 XCZU9EG-FFVB1156-2E 、 XCZU7EV-FFVC1156-2E |
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Datasheet |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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November 4, 2021 |
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Rev1.0 |
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1.1 MB |
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