UDP10GRx IP Core
■Low-latency IP for receiving UDP packet streaming from 10G EMAC
■IP and UDP checksum calculation
■IPv4 protocoI without IP fragmentation
■Operation mode: Unicast or Multicast (IGMPv2)
■Up to four sessions
■3.1 ns latency time for receiving data, measured from UDP payload data to user data at 322.266 MHz
■32-bit AvaIon stream to interface with DG LL10GEMAC IP or Intel Low latency Ethernet 10G MAC IP
■Individual clock domain for transmit and receive interface at 322.266 MHz/312.5 MHz
■Referance design available on Xilinx development board
■Customized service for following features
▲Additional sessions
▲IGMPv3
▲IP fragmentation
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XCKU040FFVA1156-2E 、 XCVU9P-FLGA2104-2L 、 XCZU9EG-FFVB1156-2-I 、 UDP10GRx |
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Datasheet |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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April 30, 2021 |
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Rev1.1 |
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526 KB |
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