Field Programmable Gate Array Application Note

2021-10-26
The AT6000 Series field programmable gate array (FPGA) lets the designer implement a 16-bit, four-to-one multiplexer with a 15 ns delay from the select control to the most significant output bit. Performance is enhanced by a unique feature of the busing architecture that enables the select control lines to be distributed across the multiplexer data path with minimal skew.

MICROCHIP

AT6000AT6000 Series

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16-bit Four-to-One MultiplexerField Programmable Gate Array

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Application note & Design Guide

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09/99

Rev. 0471C-09/99

0471C–09/99/xM

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