Digital Filters in AT6000 FPGAs Application Note

2021-10-26
This application note describes the implementation of digital filters in the Atmel AT6000-series FPGAs. Bit-serial digital signal processing is used to construct efficient Finite Impulse Response (FIR) and Infinite Impulse Response (IIR) filter macros that can be cascaded to create higher-order functions. We will briefly review the techniques first intro duced in the application note: FPGA based FIR Filter using Bit-Serial Digital
Signal Processing. Several reference designs are included that demonstrate specific filters and how they are constructed. These filters are available as hard macros that can be used in DSP designs. The implementation details of these filters along with performance, sample-rates, numeric precision, and device utilization are presented. The digital filter macros are variable coefficient filters, where the characteristics of the filter can be modified in real-time via partial dynamic reconfiguration of the FPGA.
FIR and IIR filters are used in many digital signal processing (DSP) systems to perform a variety of signal filtering and conditioning functions. The IIR filter is capable of emulating the transfer functions of analog continuous-time filters, such as low-pass, band-pass, high-pass, and all-pass (phase-shifting) types of filtering. IIR filters exhibit similar phase characteristics as their analog counterparts. For arbitrary transfer functions with linear-phase response, FIR filters are utilized and have no equivalent in the analog domain.
Applications such as telecommunications, instrumentation, digital-audio, multimedia, video and image processing can be supported with AT6000 FPGAs. The architecture of the Atmel AT6000-series FPGAs has been designed to support compute-intensive types of designs. For example, AT6000 FPGAs can be used to construct adaptive filters that a DSP or microprocessor can control through partial reconfiguration. This kind of scheme exploits the natural synergy that exists between software programmable micro processors and the reconfigurable hard ware of FPGAs. Algorithms for adaptive control are usually complex but operate at much lower data-rates than the signal processing channels they control.
Hence, the adaptive control can reside in the DSP processor and the actual signal processing can occur in the FPGA.

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AT6000AT6000-series

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Digital FiltersImplementing Bit-Serial Digital Filters

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Application note & Design Guide

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2021/05/19

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