iCE40 UltraPlus Family Data Sheet
■CE40 UltraPlus™ family from Lattice Semiconductor is an ultra-low power FPGA and sensor manager designed for ultra-low power mobile applications, such as smartphones, tablets and hand-held devices. iCE40 UltraPlus is compatible with Lattice's iCE40 Ultra family devices, containing all the functions iCE40 Ultra family has except the high current IR LED driver. In addition, the iCE40 UltraPlus features an additional 1Mb SRAM, additional DSP blocks, with additional LUTs, all which can be used to support an always-on Voice Recognition function in the mobile devices, without the need to keep the higher power consuming voice codec on all the time.
■The iCE40 UltraPlus family includes integrated SPI and I²C blocks to interface with virtually all mobile sensors and application processors. In addition, the iCE40 UltraPlus family also features two I/O pins that can support the interface to I3C devices. There are two on-chip oscillators, 10 kHz and 48 MHz, the LFOSC (10kHz) is ideal for low power function in always-on applications, while HFOSC (48 MHz) can be used for awaken activities.
■The iCE40 UltraPlus family also features DSP functional block to off-load Application Processor to pre-process information sent from the mobile device, such as voice data. The RGB PWM IP, with the three 24mA constant current RGB outputs on the iCE40 UltraPlus provides all the necessary logic to directly drive the service LED, without the need of external MOSFET or buffer.
■The iCE40 UltraPlus family of devices are targeting for mobile applications to perform all the functions in iCE40 Ultra devices, such as Service LED, GPIO Expander, SDIO Level Shift, and other custom functions. In addition, the iCE40 UltraPlus family devices are also targeting for Voice Recognition application.
■The iCE40 UltraPlus family features two device densities, 2800 to 5280 Look Up Tables (LUTs) of logic with programmable I/Os that can be used as either SPI/I²C interface ports or general purpose I/O’s. Two of the iCE40 UltraPlus I/Os can be used to interface to higher performance I3C. It also has up to 120 kb of Block RAMs, plus 1024 kb of Single Port SRAMs to work with user logic.
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iCE40UP3K 、 iCE40 、 iCE40UP5K 、 iCE40UPXX-XXXXXITR 、 iCE40UP3K-UWG30ITR 、 iCE40UP3K-UWG30ITR1K 、 iCE40UP3K-UWG30ITR50 、 iCE40UP5K-SG48I 、 iCE40UP5K-SG48ITR50 、 iCE40UP5K-UWG30ITR 、 iCE40UP5K-UWG30ITR1K 、 iCE40UP5K-UWG30ITR50 、 iCE40UP 、 iCE40 UltraPlus Family 、 iCE40 UltraPlus |
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[ smartphones ][ tablets ][ hand-held devices ][ Always-On Voice Recognition Application ][ Consumer Handheld Devices ][ Handheld Commercial Devices ][ Handheld Industrial Devices ][ Multi Sensor Management Applications ][ Sensor Pre-processing ][ Sensor Fusion ][ Always-On Sensor Applications ][ USB 3.1 Type C Cable Detect Applications ][ USB 3.1 Type C Power Delivery Applications ] |
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Datasheet |
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Please see the document for details |
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WLCS;QFN;UWG30;SG48 |
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English Chinese Chinese and English Japanese |
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December 2020 |
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Revision 1.9 |
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FPGA-DS-02008-1.9 |
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2.6 MB |
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