SiC MOSFET Clamped Inductive Load Switching Evaluation Kit

2021-06-21
To demonstrate the high performance under clamped inductive load switching of Fast Sic semiconductor Inc.(abbreviated as “FSS") MOSFETs with a gate driving daughter board and a clamped inductive load carrier board, this evaluation board and application note be established. This evaluation board (Fig. 1) comes configured as a half-bridge but it can be configured into other common topologies such as a conventional / synchronous boost or conventional / synchronous buck topology.
■This board was designed to:
●Evaluate the inductive and resistive switching performance and characterize Eon, Eoff, ton, toff , Qrr, or other related dynamic behaviors in FSS sic MOSFETs.
●Evaluate SiC MOSFET steady-state performance. The bare copper with electroless nickel immersion gold pad-opening on the bottom of the PCB with multi-through holes directly connected to the lead frame of power MOSFET. To measure the case temperature of SiC MOSFETs, users could setup thermocouples on the bottom copper so the temperature just underneath the MOSFET's case can be measured.
●Evaluate the operated ruggedness and characterize the dv/dt ruggedness, the single-pulsed avalanche energy, the repetitive avalanche energy, the safe operation area, and the short-circuit withstanding time.
●Evaluate the SiC MOSFETs under practical applications such as buck converter, boost converter, half-bridge converter, and/or other topologies.
●Referenced as a layout example for driving SiC MOSFETs.
●Use as a test platform to evaluate and tune the gate driver circuitry for FSs SiC MOSFETs.

fastSiC

FSSEVB_CILSFSSEVB_GDrvFF06190A

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Part#

SiC MOSFET Clamped Inductive Load Switching Evaluation KitClamped Inductive Load CarrierGate Driving Daughter BoardSiC MOSFET

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Application note & Design Guide

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Please see the document for details

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English Chinese Chinese and English Japanese

May 2021

Rev. A

AN-001

6 MB

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