Why Using Newer Si SJ MOSFETs May Not Be a Good Idea for High Frequency Switching

2021-06-22 fastSiC
Si Sj MOSFETs,High Frequency Switching,Si Sj MOSFETs

Key Takeaways: 

    · Output capacitance Coss-related loss is the major switching loss in resonant soft switching.

    · New generations of silicon super-junction MOSFETs (SJ MOSFETs) dissipate more energy per switching cycle than legacy ones.

    · Hysteresis of new generations of silicon super-junction is larger and increases with increasing dV/dt and peak Vds.


Resonant switching techniques are used to reduce the switching loss and increase the power density. Output capacitance (Coss) related loss is the major switching loss in resonant soft switching.

Two papers published in IEEE ISPSD (2018) and TPEL (2019) by G. Zulauf et al. (with Prof. Juan M. Rivas-Davila at Stanford University) showed that new generations of silicon super junction MOSFET are actually dissipating more energy (Ediss) than legacy ones with similar on-resistance. The data presented also show that the Ediss of silicon super junction MOSFET tends to increase with increasing frequency. That means a newer generation of silicon super junction MOSFET may be less suitable to be used in resonant topologies targeting high-frequency operations in spite of a  lower stored output capacitance energy (Eoss) noted in the datasheet.


The Ediss is the energy dissipated during each cycle of charging and discharging of Coss. The newer generation of silicon super-junction MOSFET has a smaller pitch and higher doping concentration of n-type drift layer between p-type pillars in order to reduce die size and cost. There is another paper published in IEEE EDL (2019) by Z. Lin of Chongqing Univ. shows that these features may enhance non-linearity and hysteresis of the output charge (Qoss) versus the drain-source voltage Vds curves. The hysteresis area of Qoss-Vds curves also increases with increasing dV/dt in silicon super-junction MOSFETs. Since the hysteresis area is the energy lost during the charge/discharge cycle, this observation explains why Coss related switching loss would be higher for the newer generation of silicon super junction MOSFET, and also suggests that the effect of Ediss increasing with increased switching frequency (higher dV/dt) is going to be more significant for the newer generation of silicon super-junction MOSFETs.

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