EPC2152x – 70 V, 12.5 A ePower™ Stage

2020-11-23
The EPC2152 is a single chip driver plus eGaN® FET half-bridge power stage product family. Integration is implemented using EPC’s proprietary GaN ICtechnology. Input logic interface, level shifting, bootstrap charging and gate drive buffer circuits along with eGaN output FETs configured as a half-bridge are integrated within a monolithic chip.This results in a chip-scale LGA form factor device that measures only 3.85 mm x 2.59 mm x 0.63 mm.The two eGaN output FETs in half-bridge topology are designed to have same R-DS(on). Integration of eGaN FETs with on-chip gate drive buffers practically eliminate effects of common source inductance and gate drive loop inductance.Monolithic integration combined with a pinout that uses low inductance LGA solder bumps,result in a high-current output node that can switch within 1 ns under full load with PWM frequency up to 3 MHz.
The charging path for the floating bootstrap supply is integrated using GaN FET driven bya synchronous circuit. This eliminates the need for an external bootstrap diode with associated reverse recovery charge that may result in significant power loss at high frequency switching.This synchronous bootstrap charging circuit also minimizes the voltage drop in the bootstrap charging path to ensure adequate voltage for the bootstrap power supply. Robust level shifters rom low side to highside channels are designed to operate correctly even at large negative clamped voltage and to avoid false trigger from fast dv/dt transients exceeding 100 V/ns.
Internal regulation of the gate drive voltage based on feedback from the driven output FETs ensures a safe gate voltage level while still turning on the output FETs to a low R-DS(on)state. Additional protection is provided by separate high side and low side undervoltage lockout (UVLO) circuits with lockout levels referenced to the gate drive buffer circuit to avoid operating the output FETs in a high R-DS(on) state.
The EPC2152 device is capable of interfacing to digital controllers that use standard 3.3 V or 5V CMOS logic levels. Separate and independent high side and low side logic control inputs allow external controllers to set deadtimes for optimal operating efficiency.
Features:
● Separate and independent high side and low side control inputs
● Input signal compatible with 3.3 V or 5 V CMOS logic levels
● 20 ns minimum input pulse width
● 20 ns delay time input to output
● 1 ns switching time at output node
● Robust level shifter operating from negative transient conditions
● False trigger immunity greater than 100 V/ns at output node
● Synchronous charging for high side bootstrap supply
● Regulated gate drive buffer output to drive output FETs at safe operating level
● Undervoltage lockout for high side and low side power supplies
● LGA Chip Scale Package

EPC

EPC2152xEPC21521EPC2152EPC901209774010243R

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Part#

single chip driver

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Datasheet

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Please see the document for details

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LGA

English Chinese Chinese and English Japanese

July 20, 2020

Rev 1.3

2.5 MB

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