GD5F2GQ4xFxxS SPI(x1/x2/x4) NAND Flash

2020-04-26
SPI (Serial Peripheral Interface) NAND Flash provides an ultra cost-effective while high density non-volatile memory

storage solution for embedded systems, based on an industry-standard NAND Flash memory core. It is an attractive

alternative to SPI-NOR and standard parallel NAND Flash, with advanced features:

• Total pin count is 8, including VCC and GND

• Density is 2Gbit

• Superior write performance and cost per bit over SPI-NOR

• Significant low cost than parallel NAND

This low-pin-count NAND Flash memory follows the industry-standard serial peripheral interface, and always remains the

same pin out from one density to another. The command sets resemble common SPI-NOR command sets, modified to

handle NAND specific functions and added new features. GigaDevice SPI NAND is an easy-to-integrate NAND Flash

memory, with specified designed features to ease host management:

• User-selectable internal ECC. ECC code is generated internally during a page program operation. When a page

is read to the cache register, the ECC code is detect and correct the errors when necessary. The 64-bytes spare area

is available even when internal ECC enabled. The device outputs corrected data and returns an ECC error status.

• Internal data move or copy back with internal ECC. The device can be easily refreshed and manage garbage

collection task, without need of shift in and out of data.

•Power on Read with internal ECC.It is programmed and read in page-based operations, and erased in block-based

operations. Data is transferred to or from the NAND Flash memory array, page by page, to a data register and a cache

register. The cache register is closest to I/O control circuits and acts as a data buffer for the I/O data; the data register

is closest to the memory array and acts as a data buffer for the NAND Flash memory array operation. The cache

register functions as the buffer memory to enable page and random data READ/WRITE and copy back operations.

These devices also use a SPI status register that reports the status of device operation.

GigaDevice

GD5F2GQ4xFxxSGD5F2GQ4UFxxSGD5F2GQ4RFxxSGDXXXXXXXXXXXXGD5F2GQ4RFZISGD5F2GQ4RFZJSGD5F2GQ4RFZFSGD5F2GQ4RF9ISGD5F2GQ4RF9JSGD5F2GQ4RF9FSGD5F2GQ4UFZISGD5F2GQ4UFZJSGD5F2GQ4UFZFSGD5F2GQ4UF9ISGD5F2GQ4UF9JSGD5F2GQ4UF9FSGD5F1GQ4UFxxSGD5F1GQ4RFxxSGD5F2GQ4UGD5F2GQ4R

More

Part#

SPI(x1/x2/x4) NAND Flash

More

More

Datasheet

More

Halogen Free 、 Pb Free

More

Please see the document for details

Industrial

More

More

WSON8;SOP16;TFBGA24;LGA8

English Chinese Chinese and English Japanese

2018-10-22

Version No 2.3

2.9 MB

- The full preview is over. If you want to read the whole 56 page document,please Sign in/Register -
  • +1 Like
  • Add to Favorites

Recommend

All reproduced articles on this site are for the purpose of conveying more information and clearly indicate the source. If media or individuals who do not want to be reproduced can contact us, which will be deleted.

Contact Us

Email: