256Mb DDR SDRAM HY5DU56422D(L)F HY5DU56822D(L)F HY5DU561622D(L)F
The HY5DU56422D(L)F, HY5DU56822D(L)F, and HY5DU561622D(L)F are a 268,435,456-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth.
This Hynix 256Mb DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the /CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 2-bit prefetched to achieve very high bandwidth. All input and output voltage levels are compatible with SSTL_2.
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HY5DU56422D(L)F 、 HY5DU56822D(L)F 、 HY5DU561622D(L)F 、 HY5DU56422D(L)F-X* 、 HY5DU56822D(L)F-X* 、 HY5DU561622D(L)F-X* |
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Datasheet |
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Please see the document for details |
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60 Ball FBGA |
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English Chinese Chinese and English Japanese |
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Apr. 2006 |
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Rev. 1.2 |
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878 KB |
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