Low Skew 1 to 4 Clock Buffer 551S DATA SHEET

2020-06-10
The 551S is a low cost, high-speed single input to four output clock buffer. The 551S has best in class Additive Phase Jitter of sub 50fsec.IDT makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact IDT for all of your clocking needs.

IDT

551S551SDCGI551SDCGI8551SCMGI551SCMGI8

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Part#

Low Skew 1 to 4 Clock Buffer

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Datasheet

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Pb-Free 、 RoHS

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Please see the document for details

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8-pin DFN;8-pin SOIC

English Chinese Chinese and English Japanese

03/18/15

REVISION A

PSC-4490

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