Si100x Revision E
●Title: Si100x Revision E
●Description of Change:Silicon Labs is pleased to announce revision E of Si100x devices and version 1.1 of the corresponding datasheet for these products.
Si100x Revision E devices are assembled in LGA-42 packages and are not available in QFN-42 packages used on Revision C. The LGA-42 package does not change the pin ordering or orientation of Si100x, but requires a change to the PCB landing pattern and soldering stencil.
●Reason for Change:Revision E of the Si100x allows customers to exceed the maximum VBAT ramp time, if desired, during external reset on the device. The LGA-42 package improves PCB solderability of the device.
The datasheet includes updates to Table 4.4 Reset Electrical Characteristics for additional clarification on VBAT ramp time under different operating modes along with other minor edits.
●Impact on Form, Fit, Function, Quality, Reliability:There is no change to fit, quality or reliability of these devices. The change to form is limited to the change in package to LGA-42 from QFN-42. The functional change is optional as described above.
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Si100x 、 Si1000-C-GM 、 Si1000-E-GM 、 Si1001-C-GM 、 Si1001-E-GM 、 Si1002-C-GM 、 Si1002-E-GM 、 Si1003-C-GM 、 Si1003-E-GM 、 Si1004-C-GM 、 Si1004-E-GM 、 Si1005-C-GM 、 Si1005-E-GM 、 Si1000-C 、 SA2-GM 、 Si1000-E 、 Si1002-C 、 SB2-GM 、 Si1002-E |
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PCN/EOL |
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Please see the document for details |
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LGA-42;QFN-42 |
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English Chinese Chinese and English Japanese |
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8/17/2012 |
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Revision E |
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#1208171 |
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270 KB |
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