CD4027BMS CMOS Dual J-KMaster-Slave Flip-Flop

2019-05-24
CD4027BMS is a single monolithic chip integrated circuit containing

two identical complementary-symmetry J-K masterslave

flip-flops. Each flip-flop has provisions for individual J, K,

Set Reset, and Clock input signals. Buffered Q and Q signals

are provided as outputs. This input-output arrangement provides

for compatible operation with the Intersil CD4013B dual D

type flip-flop.

The CD4027BMS is useful in performing control, register, and

toggle functions. Logic levels present at the J and K inputs

along with internal self-steering control the state of each flipflop;

changes in the flip-flop state are synchronous with the positive-going

transition of the clock pulse. Set and reset functions

are independent of the clock and are initiated when a high level

signal is present at either the Set or Reset input.

The CD4027BMS is supplied in these 16-lead outline packages:

Braze Seal DIP H4T

Frit Seal DIP H1E

Ceramic Flatpack H6W

Renesas

CD4027BMS

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Part#

CMOS Dual J-KMaster-Slave Flip-Flop

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Registers, Counters, Control Circuits ]

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Datasheet

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ISO9001

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Please see the document for details

Aerospace

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QML Class V

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English Chinese Chinese and English Japanese

December 1992

Rev 0.00

FN3302

421 KB

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