ProcessorPM-POWR605 In-System Programmable Power Supply Supervisor, Reset Generator and Watchdog Timer
●Description:
■Lattice’s Power Manager II ProcessorPM-POWR605 is a general-purpose power-supply monitor, reset generator and watchdog timer, incorporating both in-system programmable logic and analog functions implemented in non-volatile E²CMOS® technology. The Proces-sorPM-POWR605 device provides six independent analog input channels to monitor power supply voltages. Two general-purpose digital inputs are also provided for miscellaneous control functions.
■The ProcessorPM-POWR605 provides up to five open drain digital outputs that can be used for controlling DC-DC converters, low-drop-out regulators (LDOs) and opt-ocouplers, as well as for supervisory and general-pur-pose logic interface functions. The five digital, open drain outputs can optionally be configured as digital inputs to sense more input signals as needed, such as manual reset, etc.
■The diagram above shows how a ProcessorPM-POWR605 is used in a typical application. It controls power to the microprocessor system, generates the CPU reset and monitors critical power supply voltages, generating interrupts whenever faults are detected. It also provides a watchdog timer function to detect CPU operating and bus timeout errors.
■The ProcessorPM-POWR605 incorporates a 16-macro-cell CPLD. Figure 1 shows the analog input comparators and digital inputs used as inputs to the CPLD array. The digital output pins providing the external control signals are driven by the CPLD. Four independently programmable timers also interface with the CPLD and can create delays and time-outs ranging from 32 μs to 2 seconds. The CPLD is programmed using Logi-Builder™, an easy-to-learn language integrated into the PAC-Designer® software. Control sequences are written to monitor the status of any of the analog input channel comparators or the digital inputs.
●Features:
■Precision Programmable Threshold Monitors, Threshold Accuracy 0.7%
▲Simultaneously monitors up to six power supplies
▲Programmable analog trip points (1% step size;192 steps)
▲Programmable glitch filter
▲Power-off detection (75 mV)
■Embedded Programmable Timers
▲Four independent timers
▲32 μs to 2 second intervals for timing sequences
■Embedded PLD for Logical Control
▲Rugged 16-macrocell CPLD architecture
▲81 product terms / 28 inputs
▲Implements state machines and combinatorial functions
■Power-Down Mode I-CC < 10 μA
■Digital I/O
▲Two dedicated digital inputs
▲Five programmable digital I/O pins
■Wide Supply Range (2.64 V to 3.96 V)
▲In-system programmable through JTAG
▲Industrial temperature range: –40 °C to +105 °C
▲24-pin QFN package, lead-free option
|
Power Manager 、 general-purpose power-supply monitor 、 reset generator 、 watchdog timer |
|
|
|
|
|
Datasheet |
|
|
|
|
Please see the document for details |
|
|
|
|
|
|
|
|
|
|
|
English Chinese Chinese and English Japanese |
|
|
April 2015 |
|
|
Version 2.0 |
|
|
DS1034 |
|
|
3 MB |
- +1 Like
- Add to Favorites
Recommend
All reproduced articles on this site are for the purpose of conveying more information and clearly indicate the source. If media or individuals who do not want to be reproduced can contact us, which will be deleted.
Integrated Circuits
Discrete Components
Connectors & Structural Components
Assembly UnitModules & Accessories
Power Supplies & Power Modules
Electronic Materials
Instrumentation & Test Kit
Electrical Tools & Materials
Mechatronics
Processing & Customization
