LatticeECP3 sysCLOCK PLL/DLL Design and Usage Guide Technical Note

PublishTime：2021-12-10

●Introduction
■This technical note describes the clock resources available in the LatticeECP3™ device architecture. Details are provided for primary clocks, secondary clocks, edge clocks, and general routing, as well as clock elements such as PLLs, DLLs, clock dividers and more.

Brand of Product：	Lattice
Part#：	LatticeECP3 、 LatticeECP3™ More Part#
Product Category：	More
Application：	More
Data Type：	Application note & Design Guide More
Safety & Environment Standards：	More
Operating Temperature：	Please see the document for details
Qualification Grade：	More
Qualification Approval：	More
Package：
Language：	English Chinese Chinese and English Japanese
Date of Creation：	January 2020
Version Number：	Revision 2.7
Data Encoding：	FPGA-TN-02191-2.7
Data Size：	2.3 MB

Data section preview(2pages)

- The full preview is over. If you want to read the whole 55 page document,please Sign in/Register -

Download

+1 Like
Add to Favorites

Recommend

Technical Resources

More>

All reproduced articles on this site are for the purpose of conveying more information and clearly indicate the source. If media or individuals who do not want to be reproduced can contact us, which will be deleted.

Integrated Circuits