1:2 Fanout Buffer with Pre-Emphasis
The device is optimized for data rates up to 4.5 Gbps (NRZ) and for deterministic jitter in data applications and low additive jitter in clock applications. The outputs are LVDS-compliant while the differential input is compatible with a variety of signal levels such as LVDS, LVPECL and CML. Internal input termination, a bias voltage output for AC-coupling and small packaging (VFQFN) supports space-efficient board designs. The 854S712 operates from a 3.3V power supply and supports the industrial temperature range of -40°C to +85°C.
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Datasheet |
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Lead-free 、 RoHS |
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Please see the document for details |
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Industrial |
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English Chinese Chinese and English Japanese |
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October 10, 2017 |
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756 KB |
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