High Speed CMOS Logic – 74HC138 3-Line to 8-Line Decoder / Demultiplexer
● Description:
■ The 74HC138 is fabricated using a 2.5μm 5V CMOS process with the same high speed performance of LSTTL combined with CMOS low power consumption. Inputs are compatible with standard CMOS outputs and LSTTL outputs by using pull-up resistors. The device decodes a three–bit Address to one–of–eight active–low outputs. Featuring three Chip Select inputs, two active–low & one active–high to facilitate the demultiplexing, cascading, and chip–selecting functions. The demultiplexing function uses the Address inputs to select desired device output; one of the Chip Selects is used as a data input while the other Chip Selects are held in their active states.
● Features:
■ Output Drive Capability: 10 LSTTL Loads
■ Low Input Current: 1μA
■ Outputs directly interface CMOS, NMOS and TTL
■ Operating Voltage Range: 2V to 6V
■ CMOS High Noise Immunity
■ Function compatible with 74LS138.
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Datasheet |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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23/11/17 |
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Rev 1.0 |
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294 KB |
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