Charge Control Methods for SuperCapacitors
Circuit designs exploiting the increased energy storage provided by supercapacitors,requires careful consideration of the increased power handling,than that of batteries,when charging these devices.The unique composition of electrochemical double-layer capacitors (EDLC) inherently allows them to withstand large currents.Table 1 below is a brief list of KYOCERA AVX cylindrical (SCC) and series connected module (SCM) SuperCapacitors,displaying peak current supply and sink current capability.These maximum specifications will typically exceed current capability of charge sources, and lead to failures within the power supply system.
Supercapacitors have low ESR causing an uncharged supercapacitor to appear as a dead short,this will instantaneously draw maximum current from the source in an attempt to charge up to its rated capacitance[ I = C x (dV/dt) ].Typically,this charge current greatly eclipses what the power source is able to supply.In many instances,the amount of current draw is so much more than what the power supply can handle,that it will drive the power source or system into permanent failure or at least a transient upset.To demonstrate this,compare the current draw by a supercapacitor to a transient containing hundreds or thousands of amps,causing significant voltage drop across sensitive circuits resulting in bit error on high-speed transceivers,system shutdown,or software reset.In an effort to mitigate this problem,many charge limiting circuits exist,but a high level comparison of passive and active control methods can help determine which topology to implement.
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2021/10/29 |
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