Performance without Compromise: SigmaQuad-IVe™ and SigmaDDR-IVe™SRAMs
●SigmaQuad™ SRAMs
■SigmaQuad SRAMs are synchronous memories with separate read and write data buses. “Quad” refers to their ability to transfer 4 beats of data (2 beats per data bus) in a single clock cycle.
●SigmaDDR™ SRAMs
■SigmaDDR SRAMs are synchronous memories with a common read and write data bus. “DDR” refers to their ability to transfer 2 beats of data on the data bus in a single clock cycle.
●Features
■144Mbit density
■Up to 2.66B transactions per second (in 1333 MHz Quad B2 devices)
■Up to 192Gbps (in 1333 MHz Quad B2/B4 x36 devices)
■On-chip ECC for near-zero Soft Error Rates
■Supports 1.2 V HSTL/SSTL and 1.2 V POD I/O interfaces
■Rock solid signal integrity—high performance 260-pin BGAs
■Free memory controller IP available for several major FPGA platforms—silicon validated and easy licensing
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GS81314LQ 、 GS81314PQ 、 GS81314LD 、 GS81314PD 、 GS81314LT 、 GS81314PT |
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SigmaQuad-IVe SRAMs 、 SigmaDDR-IVe SRAMs 、 highest performance synchronous memories |
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Supplier and Product Introduction |
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Please see the document for details |
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BGAs |
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English Chinese Chinese and English Japanese |
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2015/9/30 |
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1.1 MB |
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