NB7V52M D Flip Flop, 1.8 V / 2.5 V Differential, with Reset and CML Outputs
●Description：
■The NB7V52M is a 10 GHz differential D flip−flop with a differential asynchronous Reset. The differential D/D, CLK/CLK and R/R inputs incorporate dual internal 50 Ω termination resistors and will accept LVPECL, CML, LVDS logic levels.
■When Clock transitions from logic Low to High, Data will be transferred to the differential CML outputs. The differential Clock inputs allow the NB7V52M to also be used as a negative edge triggered device.
■The 16 mA differential CML outputs provide matching internal 50 Ω termination and produce 400 mV output swings when externally receiver terminated with a 50 Ω resistor to V-CC.
■The NB7V52M is offered in a low profile 3 mm x 3 mm 16−pin QFN package. The NB7V52M is a member of the GigaComm™ family of high performance clock products.
●Features：
■Maximum Input Clock Frequency > 10 GHz
■Maximum Input Data Rate > 10 Gb/s
■Random Clock Jitter < 0.8 ps RMS, Max
■200 ps Typical Propagation Delay
■35 ps Typical Rise and Fall Times
■Differential CML Outputs, 400 mV Peak−to−Peak, Typical
■Operating Range: V-CC = 1.71 V to 2.625 V with V-EE = 0 V
■Internal 50 Ω Input Termination Resistors
■QFN−16 Package, 3mm x 3mm
■−40°C to +85°C Ambient Operating Temperature
■These are Pb−Free Devices
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Datasheet |
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Please see the document for details |
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QFN−16 |
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English Chinese Chinese and English Japanese |
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July, 2014 |
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Rev. 4 |
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NB7V52M/D |
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189 KB |
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