tinyAVR® 0-series, ATtiny806/1606 Preliminary Datasheet
■The ATtiny806/1606 are members of the tinyAVR® 0-series of microcontrollers, using the AVR® processor with hardware multiplier, running at up to 20 MHz, with 8/16 KB Flash, 512/1024 bytes of SRAM, and 128/256 bytes of EEPROM in a 20-pin package. The tinyAVR® 0-series uses the latest technologies with a flexible, low-power architecture including Event System and SleepWalking, accurate analog features, and Core Independent Peripherals.
●Features
■CPU:
▲AVR® CPU
▲Running at up to 20 MHz
▲Single-cycle I/O access
▲Two-level interrupt controller
▲Two-cycle hardware multiplier
■Memories:
▲8/16 KB In-system self-programmable Flash memory
▲128/256B EEPROM
▲512/1024B SRAM
▲Write/erase endurance:
◆Flash: 10,000 cycles
◆EEPROM: 100,000 cycles
▲Data retention: 40 years at 55°C
■System:
▲Power-on Reset (POR)
▲Brown-out Detector (BOD)
▲Clock options:
◆16/20 MHz low-power internal RC oscillator
◆32.768 kHz Ultra Low-Power (ULP) internal RC oscillator
◆External clock input
▲Single-pin Unified Program and Debug Interface (UPDI)
▲Three sleep modes:
■Idle with all peripherals running for immediate wake-up
■Standby:
▲Configurable operation of selected peripherals
▲SleepWalking peripherals
■Power-Down with full data retention
■Peripherals:
▲One 16-bit Timer/Counter type A (TCA) with dedicated period register and three comparechannels
▲One 16-bit Timer/Counter type B (TCB) with input capture
▲One 16-bit Real-Time Counter (RTC) running from internal RC oscillator
▲Watchdog Timer (WDT) with Window mode, with a separate on-chip oscillator
▲One USART with fractional baud rate generator, auto-baud, and start-of-frame detection
▲Master/slave Serial Peripheral Interface (SPI)
▲One Two-Wire Interface (TWI) with dual address match
◆Philips I²C compatible
◆Standard mode (Sm, 100 kHz)
◆Fast mode (Fm, 400 kHz)
◆Fast mode plus (Fm+, 1 MHz)
▲One Analog Comparator (AC) with a low propagation delay
▲One 10-bit 150 ksps Analog-to-Digital Converter (ADC)
▲Multiple voltage references (VREF):
◆0.55V
◆1.1V
◆1.5V
◆2.5V
◆4.3V
▲Event System (EVSYS) for CPU independent and predictable inter-peripheral signaling
▲Configurable Custom Logic (CCL) with two programmable look-up tables
▲Automated CRC memory scan (CRCSCAN)
▲External interrupt on all general purpose pins
■I/O and Packages:
▲18 Programmable I/O lines
▲20-pin VQFN 3x3 mm and SOIC300
■Temperature Ranges:
▲-40°C to 105°C
▲-40°C to 125°C
■Speed Grades:
▲0-5 MHz @ 1.8V - 5.5V
▲0-10 MHz @ 2.7V - 5.5V
▲0-20 MHz @ 4.5V - 5.5V
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Datasheet |
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Please see the document for details |
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VQFN;SOIC300 |
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English Chinese Chinese and English Japanese |
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07/2019 |
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Rev. B |
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DS40002029B |
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3.1 MB |
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