MPC574xP ADC Self Test
●The Successive Approximation Register (SAR) Analog Digital Converter (ADC) supports run-time hardware built in self test to verify the operation of the ADC. The ADC self test feature supports the testing of power supply integrity and structural component integrity, e.g. capacitors, switches, and comparators etc. The goal of this feature is to catch and flag any run-time catastrophic errors leading to ADC functional failure. The ADC self test includes two different self tests:
■Supply self test: Also referred to as algorithm S it is used to verify the bandgap, supply (VDD_HV_ADV) and reference (VDD_HV_ADR) voltages
■Capacitive self test: Also referred to as algorithm C it is used to to check for opens or shorts in the capacitive array
●This document details supplemental information required to operate the ADC self test feature. Two use case samples are also given to help users understand how to program the ADC self test feature.
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Application note & Design Guide |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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09/2014 |
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Rev 0 |
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AN5015 |
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323 KB |
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