TOE10GLL-IP Core

2021-08-10
●Features
■TCP/IP stack implementation
■Support IPv4 protocol without IP fragmentation
■Ultra-low latency data transmission, measured from start-of-packet to start-of-packet
▲6.2 ns latency time for transmitting data
▲46.5 ns lateny time for receiving data
■Support one session perone TOE10GLL IP (using multiple TOE10GLL IPs for multi-sessions)
■Support both Servers nd Client mode (Passive/Active open and close)
■Supported payload data size
▲1-1460 byte per packet for transmitted data (normal frame size. not jumbo frame)
▲1-16000 byte per packet for received data
■Transmit data buffer size: 4 6kByte - 73.7kByte
■User in terface: 32-bit data stream in terface
■EMAC interface: 32-bit Ava I on-stream interface for connecting with DG LL10GEMAC IP or Intel Low Latency Ethernet 10G MAC IP
■Individual clock domain for transmit and receive interface at 322.266/312.5 MHz
■Reference design available on Arria 10 GX development board
■Customized service for following features
▲Jumbo frame support
▲Buffer size extension by Window scaling feature
▲Customized user in terface

Design Gateway

10AX115S2F45I1SGTOE10GLL

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Part#

IP Core

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Datasheet

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Please see the document for details

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April 30. 2021

Rev1.1

1.7 MB

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