Virtex UltraScale+ FPGA PRODUCT BRIEF
■3D-on-3D integration for high logic density;
■Portfolio’s highest processing and serial I/O bandwidth;
■Breakout integration of networking cores;
■Industry-leading performance-per-watt.
●OVERVIEW:
■Based on the UltraScale™ architecture, the latest Virtex® UltraScale+™ devices provide the highest performance and bandwidth in a 16nm FinFET node.
■Virtex UltraScale+ FPGAs are capable of pushing the system performance-per-watt envelope, enabling breakthrough speeds with high utilization. High system performance and multiple power reduction innovations make Virtex UltraScale+ FPGAs the logical choice for compute intensive applications.
■The foundation of Virtex UltraScale+ FPGAs has been extended by leveraging Xilinx’s modular chip architectures. Xilinx also provides scalability and package migration for the lowest risk and the highest value programmable technology to maximize your return on investment.
●HIGHLIGHTS:
■Programmable System Integration:
▲Up to 9M system logic cells;
▲Up to 16GB in-package HBM DRAM;
▲Up to 500Mb of total on-chip integrated memory;
▲Integrated 100G Ethernet MAC with KR4 RS-FEC and 150G ▲Interlaken cores;
▲Integrated blocks for PCI Express® Gen3 x16 and Gen4 x8.
■Increased System Performance:
▲Up to 38 TOPs (22 TeraMACs) of DSP compute performance;
▲Up to 128 transceivers operating at 32.75Gb/s or 58Gb/s;
▲2,666Mb/s DDR4 in the mid speed grade.
■Total Power Reduction:
▲Industry’s most energy-efficient machine learning inference;
▲Voltage scaling options to tune for performance and power.
■Accelerated Design Productivity:
▲Seamless footprint migration from 20nm planar to 16nm FinFET+;
▲Co-optimized with Vivado® Design Suite for rapid design closure.
[ Compute Acceleration ][ Machine Learning ][ AI ][ Network Acceleration ][ Wired Communications ][ 5G Baseband ][ Radar ][ Test ][ Measurement ][ Emulation ][ Prototyping ] |
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