16-bit CPU H8S CPU subsystem (H8S C200)

2020-11-25
H8S is a high speed 16-bit CPU with an internal 32-bit architecture.It is upward-compatible with H8/300 and H8/300H CPUs on an object level.This subsystem includes bus controller (BSC), interrupt controller (INT), timers and serial communication interface (SCI) .Optional information packages for H8/327, H8/3048, H8S/2655 and H8S/2355 approximation are also available.
Key Features:
●An original subsystem for SoCs other than microcomputers
●3 type interfaces available to connect user functions or IPs
●compiled memory interface
●external memory interface
●peripheral bus interface
●4 type timers
●16-bit free-running timer (FRT)
●8-bit timer
●14-bit PWM timer
●Watchdog timer (WDT)
●Serial communication interface
●Supporting on-chip debug functions (option)
●Applicable to various processes and FPGAs
●Handy size

Renesas

H8S C200

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Part#

16-bit CPU

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Datasheet

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Please see the document for details

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English Chinese Chinese and English Japanese

2019.10.24

Rev.1.01

R06PM0060EJ0101

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