3.0V Standard Cell for TSMC 40nm LP
Key Features:
●3.0VTr-cell is Low Leak very smaller than Core-Cells (0.16pA @2NAND)
●Gate Delay: 180ps@2NAND@Slow Condition
●Technology is TSMC 40nm LP.
●Electrical characteristic
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Datasheet |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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2019.10.24 |
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Rev.1.11 |
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R06PM0053EJ0111 |
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218 KB |
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