Advance Information MPC105 PCI Bridge/Memory Controller Hardware Specifications

PublishTime：2020-07-14

The MPC105 provides a PowerPC reference platform-compliant bridge between PowerPC 601^TM,PowerPC 603^TM, and PowerPC 604^TM microprocessors and the PCI bus. PCI support allows systemdesigners to rapidly design systems using peripherals already designed for PCI and the other standardinterfaces available in the personal computer hardware environment. The MPC105 integrates secondarycache control and a high-performance memory controller that supports DRAM, synchronous DRAM(SDRAM), ROM, and Flash ROM. The MPC105 uses an advanced, 3.3 V CMOS process technology andis fully compatible with TTL devices.
The MPC105 supports a programmable interface to a variety of PowerPC microprocessors operating atvarious bus speeds. The MPC105's 60x interface allows for a variety of system configurations by providingsupport for either a second processor or a secondary (L2) cache. The L2 cache control unit generates thearbitration and support signals necessary to maintain a write-through or write-back lookaside cache.
The MPC105's PCI interface is designed to connect the processor and memory system to the PCI local buswithout the need for "glue" logic. The MPC105 acts as both a master and slave device on the PCI bus.
The memory interface controls processor and PCI interactions to main memory. It is capable of supportinga variety of DRAM or SDRAM, and ROM or Flash ROM configurations.
The MPC105 provides hardware support for four levels of power reduction—nap, doze, sleep, and suspend.
The MPC105's design is fully static, allowing internal logic states to be preserved during all power savingmodes.

Brand of Product：	NXP
Part#：	MPC105 More Part#
Product Category：	PCI Bridge/Memory Controller More
Application：	More
Data Type：	Datasheet More
Safety & Environment Standards：	More
Operating Temperature：	Please see the document for details
Qualification Grade：	More
Qualification Approval：	More
Package：	BGA;CBGA
Language：	English Chinese Chinese and English Japanese
Date of Creation：	5/95
Version Number：
Data Encoding：	MPC105EC/D
Data Size：	844 KB

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