MPC107 Design Guide
●Integrated memory data bus registers
●Integrated on-the-fly ECC correction
●Two additional ROM/Flash chip selects (RCS2, RCS3)
●Fewer restrictions on RCS1 accesses
●Integrated 5-port PCI arbiter
●Integrated 5- or 16- port interrupt controller
●Full PCI peripheral/target mode support, including IDSEL and INTA
●I²C controller
The MPC107 also includes many other features, such as:
●DMA controller
●Programmable timers
●Watchpoint registers (debug registers)
●I₂O controller
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Application note & Design Guide |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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8/2000 |
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Rev. 0.8 |
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AN1849/D |
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806 KB |
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