UnitedSiC JFET in Active Mode Applications Application Note
Power MOS devices, which include power MOSFETs of various construction materials and gate structures, as well as JFETs and IGBTs are three-terminal devices with current flow controlled by the gate. In most power electronic applications, the gate is driven to either block current flow with the device fully off; or fully on with minimal conduction loss. The transition between the on and off states generates high heat, and so the transition time is kept as short as practical to minimize switching power loss. Such is the art of hard-switched switch mode power supply (SMPS) design.
There are many applications where the switching transition is unavoidably proportionate to the on and off switch states, or where the operating point is deliberately set within the transition region. This application note addresses operation of both power MOS and UnitedSiC JFETs in these applications.
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Application note & Design Guide |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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April 2018 |
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AN0016 |
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2.1 MB |
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