ADP7112 20 V, 200 mA, Low Noise,CMOS LDOLinear Regulator Data Sheet
●GENERAL DESCRIPTION
■The ADP7112 is a CMOS, low dropout (LDO) linear regulator that operates from 2.7 V to 20 V and provides up to 200 mA of output current. This high input voltage LDO is ideal for the regulation of high performance analog and mixed-signal circuits operating from 20 V down to 1.2 V rails. Using an advanced proprietary architecture, the device provides high power supply rejection, low noise, and achieves excellent line and load transient response with a small 2.2 μF ceramic output capacitor. The ADP7112 regulator output noise is 11 μV rms, independent of the output voltage for the fixed options of 5 V or less.
■The ADP7112 is available in 15 fixed output voltage options. The following voltages are available from stock: 1.2 V (adjustable), 1.8 V, 2.5 V, 3.3 V, and 5.0 V. Additional voltages available by special order are 1.5 V, 1.85 V, 2.0 V, 2.2 V, 2.75 V, 2.8 V, 2.85 V, 3.8 V, 4.2 V, and 4.6 V.
■Each fixed output voltage can be adjusted above the initial set point with an external feedback divider. This allows the ADP7112 to provide an output voltage from 1.2 V to V-IN – V-DO with high PSRR and low noise.
■A user-programmable soft start with an external capacitor is available in the ADP7112. The ADP7112 is available in a 6-ball 1 mm × 1.2 mm WLCSP, making it a very compact solution.
●FEATURES
■Low noise: 11 μV rms independent of fixed output voltage
■PSRR of 88 dB at 10 kHz, 68 dB at 100 kHz, 50 dB at 1 MHz, V-OUT = 5 V, V-IN = 7 V
■Input voltage range: 2.7 V to 20 V
■Maximum output current: 200 mA
■Initial accuracy: ±0.8%
■Accuracy over line, load, and temperature ±1.8%, T-J = −40°C to +125°C
■Low dropout voltage: 200 mV (typical) at a 200mA load, V-OUT = 5 V
■User-programmable soft start
■Low quiescent current, I-GND = 50 μA (typical) with no load
■Low shutdown current 1.8 μA at V-IN = 5 V 3.0 μA at V-IN = 20 V Stable with a small 2.2 μF ceramic output capacitor
■Fixed output voltage options: 1.8 V, 2.5 V, 3.3 V, and 5.0 V 15 standard voltages between 1.2 V and 5.0 V are available
■Adjustable output from 1.2 V to V-IN – V-DO, output can be adjusted above initial set point
■Precision enable
■1 mm × 1.2 mm, 6-ball WLCSP
ADP7112 、 ADP7102 、 ADP7104 、 ADP7105 、 ADP7118 、 ADP7142 、 ADP7182 、 ADP7118ACP 、 ADP7118ARD 、 ADP7118AUJ 、 ADP7142ACP 、 ADP7142ARD 、 ADP7142AUJ 、 ADP7112ACBZ-1.2-R7 、 ADP7112ACBZ-1.8-R7 、 ADP7112ACBZ-2.5-R7 、 ADP7112ACBZ-3.3-R7 、 ADP7112ACBZ-5.0-R7 、 ADP7112CB-EVALZ |
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Low Noise, CMOS LDO Linear Regulator 、 CMOS, low dropout (LDO) linear regulator |
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[ Regulation to noise sensitive applications ][ ADC circuits ][ DAC circuits ][ Precision amplifiers ][ Power for VCO V-TUNE control ][ Communications ][ Infrastructure ][ Medical ][ Healthcare ][ Industrial ][ Instrumentation ] |
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Datasheet |
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Please see the document for details |
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LFCSP;SOIC;TSOT;WLCSP;CB-6 -15 |
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English Chinese Chinese and English Japanese |
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7/2016 |
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Rev..C |
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D12508-0-7/16(C) |
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1.2 MB |
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