Brite Semiconductor Releases General Purpose High Performance Fractional-N PLL IP and Related Solutions
Shanghai, China—Jul.9, 2022—Brite Semiconductor (Shanghai) Co., Ltd. (BriteSemi, 688691), a leading custom ASIC and IP provider, announced the successful development of a general purpose high performance Fractional-N PLL IP. This IP supports 24-bit fractional accuracy, a maximum output frequency of 4.5GHz and Spread Spectrum Clocking (SSC) functionality, which is a multi-functional fractional PLL solution.
PLL IP is typically used to generate an output frequency, and the output frequency value is a multiple of the reference input frequency of the PLL. Fractional-N PLL achieve more accurate output frequency control through fractional frequency multiplication ratios, providing higher precision and accuracy in the output frequency.
An SSC generator is a circuit that modulates the clock signal frequency within a certain range, extending the clock signal energy over a larger frequency range. This modulation technique can reduce electromagnetic interference (EMI) and improve signal integrity. As semiconductor process nodes continue to shrink, the market demand for Fractional-N PLL IP that support SSC functionality is increasing. Such designs offer the advantages of reducing electromagnetic interference, improving clock stability and reducing power consumption.
"Based on over a decade of successful experience in IP design and development, Brite Semiconductor has successfully developed a general-purpose high performance Fractional-N PLL IP. This PLL IP supports a wide range of input and output frequencies and has excellent jitter performance, which can be applied in any clock application scenario, especially in SoC environment with mixed noise signals. This high-performance Fractional-N PLL IP has been successfully taped out on 28nm process, and the test chip verification has been successfully completed. Currently, this high-performance Fractional-N PLL IP has been used by multiple customers.
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