GD9Fx1GxF3A 1G-bit 2K+64BPageSize DATASHEET
●GENERAL DESCRIPTION
■GigaDevice GD9Fx1G8F3A and GD9Fx1G6F3A are 1Gbit with spare 32Mbit capacity. A program operation can be performed in typical tPROG on the 2112-byte page and an erase operation can be performed in typical tBERS on a 128K+4K-bytes block. Data in the data page can be read out at tRC cycle time per byte. The I/O pins serve as the ports for address and data input/output as well as command input. The on-chip write controller automates all program and erase functions including pulse repetition, where required, and internal verification and margining of data. GD9Fx1G8F3A and GD9Fx1G6F3A′s provide extended reliability of 100K program/erase cycles with ECC (Error Correcting Code).
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GD9Fx1GxF3A 、 GD9Fx1G8F3A 、 GD9Fx1G6F3A 、 GD9FU1G8F3AMG 、 GD9FU1G6F3AMG 、 GD9FU1G8F3ALG 、 GD9FU1G6F3ALG 、 GD9FU1G8F3ADG 、 GD9FU1G6F3ADG 、 GD9FS1G8F3AMG 、 GD9FS1G6F3AMG 、 GD9FS1G8F3ALG 、 GD9FS1G6F3ALG 、 GD9FS1G8F3ADG 、 GD9FS1G6F3ADG 、 GD9FU1G8F3AMGI |
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Datasheet |
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Please see the document for details |
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TSOPI 48;FBGA63;FBGA48;TSOP(I)-48;FBGA-63;FBGA-48;TSOPI-48 |
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English Chinese Chinese and English Japanese |
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2023-02-15 |
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Rev1.8 |
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1.4 MB |
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