Estimating Power for ADSP-2156x SHARC+ Processors

2022-08-11
This EE-note describes how to estimate power consumption on ADSP-2156x processors, which include a SHARC+® high-performance core and a multitude of peripherals, accelerators and high-speed Direct Memory Access (DMA) channels. These processors have multiple power and clock domains. This application note provides a simplified methodology for estimating the total System-on-Chip (SoC) power consumption depending on the amount of processor activity.
Power estimates are based on design simulations and characterization data measured across power supply voltage, core and system clock frequency, and junction temperature (TJ). The power can vary widely depending on how the on-chip ADSP-2156x resources are used. Thus, power consumption cannot be estimated accurately without an understanding of the components in use and the usage patterns for those components. By providing the usage parameters, board designers can obtain accurate consumption estimates to consider when developing power supply and thermal relief solutions for their ADSP-2156x-based products.

ADI

ADSP-2156x

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Part#

SHARC+ Processors

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Application note & Design Guide

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March 15, 2021

Rev 2

EE-414

522 KB

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