MIPI CSI-2 Receiver Subsystem v5.0 Product Guide

2022-06-20
The Mobile Industry Processor Interface (MIPI) Camera Serial Interface (CSI-2) RX subsystem implements a CSI-2 receive interface according to the MIPI CSI-2 standard v2.0 [Ref 1] with underlying MIPI D-PHY standard v1.2. The subsystem captures images from MIPI CSI-2 camera sensors and outputs AXI4-Stream video data ready for image processing. The subsystem allows fast selection of the top level parameters and automates most of the lower level parameterization. The AXI4-Stream video interface allows a seamless interface to other AXI4-Stream-based subsystems.
●Features
■Support for 1 to 4 D- PHY lanes
■Line rates ranging from 80 to 2500 Mb/s (8 0 to 2936 Mb/s for Versal devices)
■Multiple Data Type support (RAW, RG B, YUV )
■Filtering based on Virtual Channel Identifier
■Support for 1, 2, or 4 pixels per sample at the output as defined in the Xilinx AXI4-Stream Video IP and System Design Guide ( UG934) [Ref 2] f ormat
■AXI4-Lite interface for register access to configure different subsystem options
■Dynamic selection of active lanes within the configured lanes during subsystem generation.
■Interrupt generation to indicate subsystem status information
■Internal D-PHY allows direct connection to image sources

Xilinx

MIPI CSI-2 Receiver Subsystem

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automotive applications ]video security surveillance cameras ]video conferencing ]virtual and augmented reality ]

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July 16, 2020

v5.0

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